M01500 - SEMI M15 - Polished Wafer Defect Limits Table for Semi-Insulating Gallium Arsenide Wafers Revision:SEMI M15-0298 - Inactive Component Manager Support — Identifies

Component Manager Support — Identifies the component-level operations needed to create

A PLHS that conforms to both the prescriptive list of safety features and the design and performance criteria for those safety features is presumed to achieve a risk level of no greater than Low (as defined by SEMI S10 and SEMI S14) and

and 16 nm technology generations

本スタンダードは，global Silicon Wafer Committeeで技術的に承認されている。現版は2007年4月25日，global Audits and Reviews Subcommitteeにて発行が承認された。2007年6月にwww

2  Surface scanners

M01500 - SEMI M15 - Polished Wafer Defect Limits Table for Semi-Insulating Gallium Arsenide Wafers Revision:SEMI M15-0298 - Inactive Component Manager Support — IdentifiesThis document defines the maximum number of defects, by type, that an acceptable polished Semi Insulating Gallium Arsenide (GaAs) wafer may exhibit. Referenced SEMI Standards None.